People

Prof. Forrest Brewer
Aditya Dalakoti
David McCarthy
Merritt Miller
Prashansa Mukim
Joseph Poverelli
Carrie Segal
Di Wang
 

Alumni

Kunal Arya
Andrew Crews
Hien Ha
Xin Hao
Steve Haynal
Greg Hoover
Jon Hsu
Chao Huang
Nitin Kataria
Imran Khan
Stephanie Lin
Scott Masch
Chuck Monahan
Royce Newcomb
Saygun Onay
Ivan Radivojevic
Andrew Seawright
Tony Stornetta
Wei Tang
Mike Torres
Aravind Vijayakumar
Jialiang (Gery) Wang
Yue Zeng

Research

Low Power Feedback Control:

• Algorithm/Metrics
• Processors
• Signal Processing

Latency Tolerant Synthesis/Design:

• PyTDL Language
• SELF Synthesis
• Pilot Designs

Pulse-Mode On-Chip Signalling

CAD Symmetry Exploitation:

• Exact Placement (BDD)
• Production Based Specification (PBS)
• Data-path Analysis
• Symbolic Scheduling
• Automata-Based Symbolic Scheduling

XPIC

Publications

(Updates in Progress)

Calendar

(Lab Members Only)

Classes

ENGR5a
ECE 124a
ECE 124d/ECE 256c
ECE256bd
ECE 224a
ECE 224b
ECE 253/ECE 153a

Support

We gratefully acknowledge the support of the following organizations:

Atrenta Corporation
INTEL Corporation
Ricoh Corporation
Chameleon Corporation
National Science Foundation
Semiconductor Research Corporation

Downloads

• PyTDL: Distributed Latency Tolerant Verilog Compiler (v.1.0) SRC/Intel/NSF

• PYABSS: Python implementation of Automata-Based Symbolic Scheduling

• HomeBrew C++ BDD Package

• PyCUDD: Python Interface to the CUDD BDD Package

• Synthetic DFG Scheduling Benchmarks

• XPIC Processor Info