- Ph.D. Candidate, University of California, Santa Barbara, CA, U.S.A., Oct. 1994.
- M.S.E.E., Drexel University, Philadelphia, PA, U.S.A., Dec. 1990.
- B.S.E.E., University of Belgrade, Yugoslavia, July 1987.
(Curriculum Vitae available here)
- Computer-aided design of integrated circuits: high-level synthesis and logic design
- Microarchitectural design and instruction-level parallelism: hardware/software issues in superscalar, VLIW and multithreaded architectures
- BDD applications to combinatorial and algebraic problems
Department of Electrical and Computer Engineering
University of California
Santa Barbara, CA 93106, U.S.A.
- I. Radivojevic and F. Brewer, "A New Symbolic Technique for Control-Dependent Scheduling", IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, to appear.
- I. Radivojevic and F. Brewer, "Analysis of Conditional Resource Sharing using a Guard-based Control Representation", Proc. Int. Conf. Computer Design, Austin, TX, Oct. 1995.
- I. Radivojevic and F. Brewer, "Symbolic Scheduling Techniques", IEICE Trans. Information and Systems, Japan, vol. e78-d, no. 3, March 1995.
- I. Radivojevic and F. Brewer, "On Applicability of Symbolic Techniques to Larger Scheduling Problems", Proc. European Design and Test Conf., Paris, France, March 1995.
- I. Radivojevic and F. Brewer, "Incorporating Speculative Execution in Exact Control-Dependent Scheduling", Proc. 31st ACM/IEEE Design Automation Conf., San Diego, CA, June 1994.
- I. Radivojevic and F. Brewer, "Ensemble Representation and Techniques for Exact Control-Dependent Scheduling", Proc. 7th Int. Symp. High-Level Synthesis, Niagara-on-the-Lake, Ontario, Canada, May 1994.
- I. Radivojevic and F. Brewer, "Symbolic Techniques for Optimal Scheduling", Proc. 4th Synthesis and Simulation Meeting and Int. Interchange (SASIMI), Nara, Japan, Oct. 1993.
- I. Radivojevic and J. Herath, "Executing DSP Algorithms in a Fine-Grained Dataflow Environment", IEEE Trans. Software Engineering, vol. 17, no. 10, Oct. 1991.
- I. Radivojevic, J. Herath, and W.S. Gray, "High-Performance DSP Architectures for Intelligence and Control Applications", IEEE Control Systems Mag., vol. 11, no. 4, June 1991.