The capacitor well described in this and the next rule only apply to SCN3MLC and SCN3MLC_SUBM technology codes manufactured on an Agilent/HP AMOS14TB run.
|17.3||Minimum spacing to external active||5||6||n/a|
|17.4||Minimum overlap of active||5||6||n/a|
These rules illustrate the construction of a linear capacitor in a capacitor well. The capacitor itself is the region of overlapped poly and active. The active area is electrically connected to the cap well
|18.2||Minimum poly extension of active||2||2||n/a|
|18.3||Minimum active overlap of poly||3||3||n/a|
|18.4||Minimum poly contact to active||2||2||n/a|
|18.5||Minimum active contact to poly||6||6||n/a|