Chuck Monahan

1620 Loganberry way

Pleasanton, CA 94566, U.S.A

EDUCATION

University of California at Santa Barbara (1985 - 1997)

Ph.D. in Electrical and Computer Engineering (1997)

Thesis: Symbolic Data Path Analysis

Research Interest

Computer -aided design of integrated circuits: high-level synthesis and logic design.
BDD applications to combinatorial and algebraic problems.

B.S. and M.S. in Electrical and Computer Engineering (1990), (1993)

Electrical Engineering Teaching Assistant of the Year (1991)

Programming languages: C++, C, Fortran, Ada, Eiffel, SQL, Access-Basic, assemblers for Intel microprocessors.

CAD tools experience: SIS, Magic

Research assistant, University of California at Santa Barbara (1990-1997)

California Micro Fellowship w/Mentor Graphics, U.C. Santa Barbara (1994, 1995, 1996)

Symbolic data path constraint formulation for high-level problems

CAD research group development of C++ generic-object and CAD library

VLSI circuit design: Bicycle computer

Consultant and Owner, Monahan Consulting (1993-present):

Instructed Navy personnel and professionals on Communications and Networks issues and Ada and C programming languages.
Developed client/server data base systems for industrial settings including review and development of operational procedures in addition to construction of SQL server and ACCESS client software.

Paper reviewer for ACM/IEEE Design Automation Conference (1995, 1996)

Instructor, Logic Design and Switching Theory, University of California at Santa Barbara (1993, 1994)

Instructor, Microprocessor-Based Digital Design, University of California at Santa Barbara (1993)

Graphics Programmer, San Jose State Foundation, NASA Ames Research Center, Mountain View, CA (1989, 1990, 1991, 1992)

Computer Operator A, EG&G: Energy Measurements, Goleta, CA (1988)

"STEM: Concurrent Analysis for Data Path Timing Optimization", Mentor Graphics, Wilsonville, OR, Feb. 1996.

"Symbolic Automata Based Data-Path Analysis", UCSB CAD and Test Research Review, University of California at Santa Barbara, March 1995.

"Timing Driven Interconnect Synthesis", Linking Behavior and Physical Models of Hardware, University of California at Irvine, May 1992.

"Scheduling and Binding Bounds for RT-Level Symbolic Execution", International Conference on CAD-97, San Jose, CA, Nov. 1997.

"Concurrent Analysis Techniques for Data Path Timing Optimization", 33rd IEEE/ACM Design Automation Conference Proceedings, Las Vegas, NV, June 1996.

"Symbolic Modeling and Evaluation of Data Paths", 32nd IEEE/ACM Design Automation Conference Proceedings, San Francisco, CA, June 1995.

"Symbolic Execution of Data Paths", Proceedings of 5th Great Lakes Symposium on VLSI, Buffalo, NY, March 1995.

"Communication Driven Interconnection Synthesis", Proceedings of 6th International Workshop on High Level Synthesis, Dana Point, CA, Nov. 1992.

"Symbolic Modeling and Evaluation of Data Paths", ECE Technical Report #94-26, University of California at Santa Barbara, Nov. 1994.

"HomeBrew, C++ library manual pages", ECE Technical Report #94-28, University of California at Santa Barbara, Dec. 1994.