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Steve Haynal

To pursue research in high level VLSI design and design automation in an applied industrial setting.

Ph.D., Electrical & Computer Engineering, University of California, Santa Barbara (anticipated completion, Fall 2000)
M.S., Electrical & Computer Engineering, University of California, Santa Barbara (1997)
B.S., Pacific Union College, Angwin (1991)

Computer Engineering: Computer Aided Design, High Level Synthesis, Scheduling, VHDL, Verilog, FPGAs, Computer Architecture, VLSI Design, Digital System Design
Programming Languages: C++, C, Python, Assembly, Tcl/tk, HTML, BASIC, FORTRAN
Operating Systems: UNIX (Linux and Solaris), DOS, Windows (3.1/95/98/NT/2000)

VLSI Project Testing and Design (1995-1996):
    Designed, tested and fabricated working position/velocity/acceleration chip
Advanced Computer Architecture (1996):
    Wrote behavioral VHDL snooping cache and register renaming models
Advanced VLSI Architecture and Design (1996-1997):
    Designed, tested and fabricated working compress/encrypt chip (Slides, Contest Paper)
Design Automation Sequence (1996-1999):
    Wrote C++ program for standard cell incremental timing-driven placement (Slides, Report)
    Wrote C++ programs for symbolic BDD-based exact graph vertex coloring (Slides, Report) and unate covering

S. Haynal and F. Brewer, "Representing and Scheduling Looping Behavior Symbolically", IEEE Int. Conf. Computer Design, to appear, 2000.
S. Haynal and F. Brewer, "A Model for Scheduling Protocol-Constrained Components and Environments", Proc. of 36th ACM/IEEE Design Automation Conf., pp. 292-295, 1999.
S. Haynal and F. Brewer, "Efficient Encoding for Exact Symbolic Automata-Based Scheduling", IEEE Int. Conf. Computer-Aided Design, pp. 477-481, 1998.
S. Haynal and B. Parhami, "Arithmetic Structures for Inner-Product and Other Computations Based on a Latency-Free Bit-Serial Multiplier Design", Proc. of the 30th Asilomar Conf. on Signals, Systems, and Computers, pp. 197-201, 1996.
Published electronics project in QEX, an amateur radio hobbyist magazine. (1991)
Published computer game in COMPUTE! (1984)

Haynal Consulting (1998-2000):
    Designed, prototyped and tested FPGA-based PCI cards, Verilog IP cores, drivers and software libraries for niche applications
Intel Research Intern (1999):
    Successfully applied Ph.D. research in symbolic scheduling and high level synthesis to large industrial design problems
National Semiconductor Co-op (1997):
    Implemented virtual mode for an embedded x86 processor
    Contributed code to and helped debug a 50,000+ line C design model and Tcl/tk GUI
Fischer Computer Systems Intern/Engineer (1989-1993):
    Responsible for quality control, repair and design of digital electronics products

Contract Teacher for Technical Research Associates, Inc. (1998-2000):
    Developed and taught intensive course in Visual C++
Teaching Assistant at University of California, Santa Barbara (1995-1999):
    Responsible for laboratory sections, laboratory renovation, periodic lectures, office hours and grading
Teacher at San Fernando Valley Academy, Northridge (1993-1995):
    Taught computer courses, physics, chemistry, earth science, biology and math

Awarded Delco Defense Systems Operations Graduate Fellowship (1998)
Won second place, experienced category, in University of Michigan's VLSI design contest for the Rogue data compress-encrypt chip (Slides, Contest Paper) (1997)
Awarded Teacher of the Year at San Fernando Valley Academy (1995)
Received Richard E. Fischer Award for excellence in technology (1990)
Won California Resource Conservation Software Competition (1983)